The 4G Long Term Evolution (LTE) is the latest standard in wireless communication technology. The Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier modulation method in LTE to have better bandwidth efficiency, and one of the most computationally intensive operations of OFDM is Fast Fourier Transform (FFT). The LTE defines various sizes of FFTs which are required at both basestations and terminals to transmit and to receive signals up to 20 MHz bandwidth. The use of large size FFTs in the physical layer consumes a significant percentage of processing power of the processor.
Mixed-radix FFT was proposed to decompose and factor the large data length into shorter lengths such as 2, 3, 4 or 5, and uses the small sized FFT modules to compute the original large sized input data length more efficiently. While there have been efforts to find efficient ways to parallelize the mixed-radix FFT implementation, the efforts were mainly focused on FFT sizes of power of 2 or power of 4, and none have been able to restructure the process efficiently to fit better on target Single Instruction Multiple Data (SIMD) vector processors for any composite sized FFT which is factored into factors such as 2, 3, 4 and 5.
Thus, techniques for implementing mixed-radix FFT on SIMD vector processors efficiently for the latest standard in wireless communication technology such as 4G LTE would be desirable.